SVA Sequences III – Other Operators

Operator AND

The binary operator AND is used when both operands are expected to match, but the end times of the operand sequences may be different. That means, when one of the operand sequence match, it waits for the other to match. Please note that both sequence must start at the same time.

The seq_AND will match only if both my_seq1 and my_seq2 match.

Operator OR

The binary operator or is used when at least one of the two operand sequences is expected to match. Both of the sequences start at the same time and end times may be different.

The seq_OR will match if one of the sequences (my_seq1 or my_seq2) match.


The binary operator intersect is used when both operand sequences are expected to match, and the end times of the operand sequences must be the same. The end time of resulting sequence is the common end time of the two operand sequences.

The intersect operator is very similar to the and operator with the difference that both sequences complete at the same time.

Operator first_match

This operator matches only the first of possibly multiple matches for an evaluation attempt of its operand sequence and it returns a sequence.

This allows all subsequent matches to be discarded from consideration.

Operator throughout

Sometimes a sequence is only valid under the assumption that a certain condition is true during this sequence. In such cases, use the throughout operator in order to check a boolean expression in parallel to a sequence. The expression must evaluate to true at each clock tick of the sequence.

For example, the signal enable must be asserted during the entire req-ack-done handshaking.

Operator within

The containment of a sequence within another sequence can be expressed using within operator.

seq1 within seq2
-start point of the match of seq1 shall be no earlier than the start point of the match of seq2.
-end point of the match of seq1 shall be no later than the end point of the match of seq2
-seq2 matches along the interval and seq1 matches along some subinterval of consecutive clockticks.

In the window, start with “rdy” and end with “done”, the design must have 8 “read”s.

Operator Precedence [high to low]

  • repetition [*] [=] [->]
  • delay ##
  • throughout
  • within
  • intersect
  • and
  • or
Sini Balakrishnan

Sini Balakrishnan

Staff Engineer at Intel
Sini has spent more than a dozen years in the semiconductor industry, focusing mostly on verification. She is an expert on Formal Verification and has written international papers and articles on related topics.
Sini Balakrishnan

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