ASIC Physical Design Flow

In the VLSI design cycle, after the circuit representation is complete, we go to “physical design”. This is the stage where the circuit description is transformed into a physical layout, that is the actual physical representation of the circuit in terms cells, their placement, power connections and the interconnection between them. I am consolidating the previous design flow articles in this website here.

Renoy [Public domain], <a href="https://commons.wikimedia.org/wiki/File:Physical_design_flow.JPG">via Wikimedia Commons</a>
By Renoy – Own work, Public Domain, https://commons.wikimedia.org/w/index.php?curid=5083389
  1. Netlist In & Floorplanning: https://vlsi.pro/physical-design-flow-i-netlistin-floorplanning/
  2. Placement : https://vlsi.pro/physical-design-flow-ii-placement/
  3. Clock Tree Synthesis : https://vlsi.pro/physical-design-flow-iiiclock-tree-synthesis/
  4. Routing: https://vlsi.pro/physical-design-flow-iv-routing/
  5. Physical Verification: https://vlsi.pro/physical-design-flow-v-physical-verification/

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