Color schemes
Last modified 2026-01-26
Sini
Multicycle paths between different clock domains
Synopsys Design Constraints
Reading ICC Timing Reports
SPEF Files Explained
set_timing_derate
set_clock_uncertainty
STA - Setup and Hold Time Analysis
Multi Cycle Paths
Standard Delay Format
Recovery and Removal Checks
Minimum Pulse Width Check
Useful Skew
Common Path & Clock Reconvergence Pessimism Removal
OCV & AOCV